Seibu SPI System
Hardware Specifications,
Games, and Pictures
Seibu SPI Board w/ Raiden Fighters daughterboard. Picture by chimpmeister
The Seibu SPI System is a powerful piece of arcade hardware. It has excellent 2D graphics capabilities and a digital sound system. The core CPU in this hardware is an Intel 386DX CPU. It typically runs at a clock speed of 25MHz. It can run up to 33MHz for later Seibu SPI games like Raiden Fighters Jet. The games are contained into separate daughterboard cartridges. This means that you can interchange different games on one Seibu SPI board. The YMF271 is an undocumented Yamaha chip. It is sample based, and apparently can load 8 and 16 bit samples of various formats, but no stereo samples though. It has at least 8 channels polyphony, similar to the ADPCM chip used in Cave games such as Dodonpachi, and probably no FM capability (not proven yet). 

The Seibu SPI was once thought to employ some nasty encryption and protection schemes, as well as a suicide feature. This has been proven incorrect recently. The game program ROMs and the graphic object ROMs are encoded using byte-by-byte interleaving (which is why some people were unsuccessful in finding x86 code directly from the program ROMs). The much-talked about Dallas MCU chip on the SPI board turned out to be nothing more than an RTC (Real-Time Clock). The battery on the SPI mainboard is not a suicide battery. If the battery was a suicide battery, what would be there to kill? There's no game or boot program to kill on the SPI board. The game cartridges don't contain any battery, and that's the only SPI component that has any program at all. Even the English Fabtek manuals for the SPI games state that the boards come with a "battery-backed memory." This memory stores such information as bookkeeping records, high score tables, and other features like the time-release of Raiden Fighters 2. The CR-2032 battery doesn't appear to be soldered onto the board; it seems that it can be easily replaced. Also, it seems that the board will run with a dead battery.

-Thanks go to chimpmeister for providing information and pictures about the Seibu SPI hardware. Thanks also go to the Swiss Collectors and ZeroKnightRaiden for additional SPI information.

Seibu SPI Specs
Main Board Dimensions 11" x 10.25" (27.94cm x 26.04cm)
Core CPU Intel 386DX 25MHz or 33MHz
Graphics Subsystem Seibu Custom Chip
Sound System Yamaha YMF-271 F
Zilog Z-80 AP-8
Daughterboard ROM Capacity At least 24MB
Interface Standard JAMMA +
Other Features Dallas MCU (Real-Time Clock)

Battery-backed S-RAM utilizing a CR-2032 coin battery, allowing high-scores and other pertinent game information to be saved after power-off.

Seibu SPI Games
Seibu SPI Pictures
Senkyu (Battle Balls) - 1995
Viper Phase 1 - May 1995
Viper Phase 1: New Version - August 1995
E-Jan High School - 1996 (Japan Only)
Raiden Fighters - November 1996
Raiden Fighters 2: Operation Hell Dive - November 1997
Raiden Fighters Jet - August 1998
Stack of four Seibu SPI boards
VP1 - Top View 1
VP1 - Top View 2
VP1 - Top View 3
VP1 - Side View 1
VP1 - Side View 2
RF1 - Top View 1
RF1 - Top View 2
RF1 - Top View 3
RF1 - Side View 1
RF1 - Side View 2
RF2 - Top View 1
RF2 - Top View 2
RF2 - Top View 3
RF2 - Side View 1
RFJ - Top View 1
RFJ - Top View 2
RFJ - Top View 3
RFJ - Side View 1

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